![]() Programmable Logic
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These pages deal about Programmable Logic, specifically about the design of digital systems with Programmable Logic Devices (PLDs) and Field Programmable Gate Arrays (FPGAs). We have been working since 1985 in the design of PLD and FPGA applications, at the Department of Electronics Technology at the University of Vigo in Spain. Now we have decided to share some of our knowledge and work to ease other people the design of their own PLD or FPGA based digital sytems.
Clicking on the next links, you can access to:
Courses on digital design with PLDs and FPGAs (in Spanish) VHDL circuits and application examples (in Spanish) Other applications (in Spanish) Didactic equipments (in Spanish)
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This page is maintained by: Luis Jacobo Álvarez Ruiz de Ojeda. Industrial Engineer by the University of Vigo, Spain. PhD. in Electronics by the University of Vigo, Spain. Full professor at the Department of Electronics Technology at the University of Vigo, Spain. Email: Personal profile
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